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Test equipment

Contributors in Test equipment

Test equipment

System on a chip (SOC)

Semiconductors; Test equipment

Practise of integrating one or more processor cores, embedded memories, peripheral interfaces, and sometimes mixed signal circuits onto a single chip to form a complete (or nearly complete) system.

Wafer level burn in (WLBI)

Semiconductors; Test equipment

Wafer Level Burn In is a manufacturing technique where a particular product is burned in as full wafers to take advantage of massive parallelism and higher temperature acceleration factors.

Pseudo- random pattern generator (PRPG)

Semiconductors; Test equipment

PRPGs are LFSRs that are sometimes used on the front end of BIST engines to generate pseudo-random patterns to be presented to a circuit under test.

Automatic built in self test (ABIST)

Semiconductors; Test equipment

1) A form of memory BIST for embedded memories. 2) A form of BIST targeted at testing analogue circuits.

Guard band

Semiconductors; Test equipment

1. (device testing) Adjustment made to a DUT's test specification to take into account test-system accuracy, repeatability, reproducibility, and correlation.

Link

Semiconductors; Test equipment

1. (scan) The data fed to a scan pin on one scan clock cycle Ñ the scan equivalent of a parallel vector.

Vector

Semiconductors; Test equipment

1. A parallel vector is the functional logic applied to a DUT during one clock cycle.

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