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Digital Signal Processors (DSP)
Industry: Semiconductors
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Digital Signal Processors (DSP)
Timer divide-down register (TDDR) bits
Semiconductors; Digital Signal Processors (DSP)
A field that specifies the timer divide-down ratio (period) for the on-chip timer. When the timer prescaler counter (PSC) is decremented past 0, the PSC is loaded with the contents of the TDDR. At ...
Mpcl
Semiconductors; Digital Signal Processors (DSP)
A shell utility that invokes the multimedia video processor (MVP) master processor compiler, assembler, and linker to create an executable object file version of your master processor program.
Format (FO) bit
Semiconductors; Digital Signal Processors (DSP)
A field that specifies the word length of the serial port transmitter and receiver. The data is transferred with the most significant bit (MSB) first. At reset, FO = 0. This bit is stored in the ...
Composite synchronisation (CSYNC)
Semiconductors; Digital Signal Processors (DSP)
A signal that combines information about the horizontal and vertical timing intervals into one signal that is more complex than either horizontal synchronisation (HSYNC) or vertical synchronisation ...
TDM address (TADD)
Semiconductors; Digital Signal Processors (DSP)
A single, bi-directional address line that identifies which devices on the four-wire serial bus should read in the data on the TDM data (TDAT) line.
Hex command file
Semiconductors; Digital Signal Processors (DSP)
A file that contains hex conversion utility options and names input files for the hex conversion utility.
TDM clock (TCLK)
Semiconductors; Digital Signal Processors (DSP)
A single, bi-directional clock line for time-division multiplexed (TDM) operation. The TDM receive clock (TCLKR) and TDM transmit clock (TCLKX) pins are externally connected to form the TCLK line.