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Digital Signal Processors (DSP)

Contributors in Digital Signal Processors (DSP)

Digital Signal Processors (DSP)

Cache subblock

Semiconductors; Digital Signal Processors (DSP)

One of four partitions of a cache block. Cache subblocks are the unit of memory brought into a cache on a subblock miss. Each subblock has a present bit (and a dirty bit for master processor (MP) ...

Frame timer

Semiconductors; Digital Signal Processors (DSP)

A timer In the video controller (VC) that provides video timing control and indicates to the serial register transfer (SRT) controller when an SRT is necessary.

Status

Semiconductors; Digital Signal Processors (DSP)

One byte of information sent from a target to an initiator on completion of a command.

Index registers

Semiconductors; Digital Signal Processors (DSP)

Two registers (IR0 and IR1) that are used by the auxiliary register arithmetic unit (ARAU) for indexing an address.

Capture mode

Semiconductors; Digital Signal Processors (DSP)

1) A serial-register-transfer (SRT) mode during which an image is captured and stored into memory. Memory locations not corresponding to the captured image may be overwritten. See also display mode; ...

Control register

Semiconductors; Digital Signal Processors (DSP)

A mechanism for controlling and monitoring the operation of a device.

Carry bit

Semiconductors; Digital Signal Processors (DSP)

A bit in the status register used by the arithmetic logic unit (ALU) for extended arithmetic operations and accumulator shifts and rotates. The carry bit can be tested by conditional instructions.

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