Digital Signal Processors (DSP)

Digital Signal Processors (DSP)

Industry: Semiconductors

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Digital Signal Processors (DSP)

Delta-guided transfer

Semiconductors; Digital Signal Processors (DSP)

A type of guided packet transfer in which the guide table consists of delta values to be added to the starting address of the previous two-dimensional patch to form the starting address of the new ...

EMIF CE space

Semiconductors; Digital Signal Processors (DSP)

One of the four memory spaces defined by a chip enable on the EMIF.

Frame lock

Semiconductors; Digital Signal Processors (DSP)

Video controller (VC) mode that allows the two frame timers to be locked together so that they are synchronous. This is useful when different timing signal parameters are required in the capture and ...

Offset-guided transfer

Semiconductors; Digital Signal Processors (DSP)

Type of source-guided transfer in which the guide table consists of values to be added to a base address given in the packet transfer parameters to form the starting address of each patch. See also ...

Named section

Semiconductors; Digital Signal Processors (DSP)

1) An initialized section that is defined with a .sect directive; 2) an uninitialized section that is defined with a .usect directive.

Load colour register (LCR) cycle

Semiconductors; Digital Signal Processors (DSP)

A memory cycle generated by the transfer controller (TC) that writes a specified value into the video RAM (VRAM’s) colour registers for use during a block-write cycle. LCR cycles are supported only ...

Packet transfer (PT)

Semiconductors; Digital Signal Processors (DSP)

A transfer of data blocks between two areas of memory. The multimedia video transfer (MVP) supports packet transfers of one, two, or three dimensions. See also dimensioned transfer, guided transfer.