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Test equipment

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Test equipment

Delta modulation (DM)

Semiconductors; Test equipment

The OSI level that performs the assembly and transmission of data packets (gets data packets on and off the wire), does error detection and correction, synchronisation and retransmission. It includes ...

Design for X (DFX)

Semiconductors; Test equipment

A generic name for the members of a family of methodologies adopted for improve the project and conception of a product for a determined objective (as cost, assembly facility, repairing or other), of ...

Design rules for test

Semiconductors; Test equipment

(DFT Rules) - The set of design restrictions placed on a design description for the test process. These rules are applied to ease the vector generation process (manual or ATPG); to enhance the ...

Depot level maintenance (DLM)

Semiconductors; Test equipment

Maintenance in which the faulty SRU is tested to determine the cause of the malfunction. Faulty components are removed and replaced, and the SRU is verified ready for service by successful ...

Dynamic link library (DLL)

Semiconductors; Test equipment

A library which is linked to application programmes when they are loaded or run rather than as the final phase of compilation. This means that the same block of library code can be shared between ...

Design for testability (DFT)

Semiconductors; Test equipment

A philosophy and activity whereby the designer of a circuit takes into account the method used to test the circuit and designs the product in a manner which will reduce the cost and effort of ...

Differential interference contrast (DIC)

Semiconductors; Test equipment

A mode of contrast generation in microscopy that yields an image with a shadow relief. The relief reflects the gradient of optical path difference. DIC, which is a form of interference microscopy ...

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